123 Gaither Drive
Mount Laurel, NJ 08054-1701
Phone: 1-877-983-4514
FAX: 1-856-866-1100
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Boundary Scan
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What is Boundary Scan?
Boundary-scan, as defined by the IEEE Std. 1149.1 standard, is an integrated method
for testing interconnects on printed circuit boards that is implemented at the IC
level. The inability to test highly complex and dense printed circuit boards using
traditional in-circuit testers and bed of nail fixtures was already evident in the
mid eighties. Due to physical space constraints and loss of physical access to fine
pitch components and BGA devices, fixturing cost increased dramatically while fixture
reliability decreased at the same time.
In the 1980s, the Joint Test Action Group (JTAG) developed a specification for boundary-scan
testing that was standardized in 1990 as the IEEE Std. 1149.1-1990. In 1993 a new
revision to the IEEE Std. 1149.1 standard was introduced (titled 1149.1a) and it
contained many clarifications, corrections, and enhancements. In 1994, a supplement
that contains a description of the boundary-scan Description Language (BSDL) was
added to the standard. Since that time, this standard has been adopted by major
electronics companies all over the world. Applications are found in high volume,
high-end consumer products, telecommunication products, defense systems, computers,
peripherals, and avionics. Now, due to its economic advantages, smaller companies
that cannot afford expensive in-circuit testers are using boundary-scan.
Corelis and Blackhawk Compatibility
Corelis and Blackhawk are both part of EWA Technologies, Inc. and have integrated
the powerful Boundary-scan tools from Corelis with the Advanced JTAG emulators from
Blackhawk. This integration allows customers who are currently using Blackhawk
emulators to debug their TI DSP boards to extend their test capability by being
able to run Corelis boundary scan software tools without the added expense of
purchasing another controller. Greater testability for less money!
Below is a list of Corelis products already integrated and
tested with the Blackhawk XDS560-class emulators along with a short description
and link to the Corelis web site for additional details.
To find out if your emulator and processor are supported, please contact Corelis
or Blackhawk by email or phone, because the list is always growing...C2000,
C5000, C6000, OMAP, Davinci, etc.
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Boundary Scan Tools
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ScanExpress Programmer
ScanExpress Programmer offers several programming methods. Utilizing a high-performance
Corelis controller with built-in support for JTAG, I2C, and SPI, and user friendly
Windows-based software, ScanExpress Programmer can program components utilizing
any of four individually licensed modules: SPI Programmer I2C Programmer Target
Assisted Flash Programmer (TAFP) JTAG Programmer.
more...
ScanExpress Debugger
The ScanExpress Debugger is an excellent tool for engineers doing debug during prototype
design verification and testing. It is very useful for finding shorts and opens
on and between BGA devices and other fine-pitch components. The ScanExpress Debugger
allows interactive control and observation of all the boundary-scan controllable
inputs and outputs on a Unit Under Test (UUT). It can also apply data to inputs
of clusters and read their responses if the cluster I/Os are accessible via boundary-scan
components.
more...
ScanExpress Runner V6.0
The ScanPlus system includes the ability to execute boundary-scan tests and perform
In-System Programming in a pre-planned specific order called a test plan. Test vectors,
in the form of Compact Vector Format (CVF) files which have been generated using
ScanExpressTPG, can be automatically executed and the results displayed and logged
to a file. Other formats such as SVF, JAM, STAPL, and J-Drive are also supported.
Different test plans may be constructed for different UUT's. Tests within a test
plan may be reordered, enabled or disabled. An unlimited number of different tests
can be combined into a test plan. The software used to run these tests is ScanPlus
Runner.
more...
Target Assisted Flash Programmer (TAFP)
The Target Assisted Flash Programmer takes advantage of the embedded CPU on the
target board to shorten the Flash memory programming time and simplify the operation
of Flash programming. With the Target Assisted Flash Programmer, the user can perform
many Flash programming functions such as erase, blank check, program, verify, obtain
device ID, etc. All of these functions can be performed while the device is installed
in-circuit. The Target Assisted Flash Programmer has the ability to test the JTAG
connection, test the RAM, check the Flash device ID, erase the Flash device, verify
the erasure, download Flash data to RAM, program the Flash device, and verify the
Flash data in one step.
more...
ScanExpress JET
JTAG Emulation Test (JET) makes automatic test generation of structural and functional
testing a reality. This test methodology extends coverage beyond popular boundary-scan
techniques to virtually every signal accessible by an on-board processor (CPU).
It drastically improves test coverage and diagnostic information. JET testing is
dependent on the UUT having a JTAG-enabled CPU on-board. The JET method harnesses
the power of the target embedded CPU to assist in the code download, device programming
and testing operations, at full processing speed.
more...
Related Resources
-Major
Benefits of IEEE 1149.7
-Design
Test Guidelines
-Boundary
Scan
-Debug
a Dead Board
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Boundary Scan