JTAG emulator for beginners

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Blackhawk JTAG Emulators for Texas Instruments DSPs are Advanced, High-speed USB and LAN based products. Blackhawk Emulators support Texas Instruments TMS320™ DSP TMS470 (ARM®) and OMAP™ platforms and are compatible with Code Composer Studio (CCStudio™)IDE. Blackhawk JTAG Emulators are available from a worldwide network of industry resellers.

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JTAG
	The term JTAG is an acronym for Joint Test Action Group, a consortium of companies that banded together in 1985. The purpose was to devise a method of testing hardware at the IC level in an effort to eliminate the time consuming and costly procedure of building test fixtures. Their efforts resulted in a specification published by the IEEE as 1149.1.Today, IEEE 1149.1 is commonly referred to and interchangeable with "boundary scan". While the terms JTAG and boundary scan may be thought of as identical, there are major differences in the implementation based on the manufacturer and specific hardware design models. There are however, a few basic elements that must be present to facilitate JTAG functionality. Additional Resources Emulation Fundamentals for TI's DSP Solutions..................... [download] Common Trace Transmission Problems and Solutions............ [download] XDS560 Emulation Brings Real-Time Debugging Visibility to.... [download] JTAG/IEEE 1149.1 Design Considerations.............................. [download] Texas Instruments JTAG Emulator Configurations At the present time, there are four JTAG emulator configurations that are in use on Texas Instruments Development Kits (DSK) and Evaluation Modules (EVM). Standard 14-pin JTAG Emulator Header This is the most common of TI JTAG emulator headers. It is a 2x7 header (AMP P/N:dadas) with 0x100” x0.100” pin spacing. The pin configuration of this header is as follows: TMS Test mode select TDI Test data input TDO Test data output TCK Test Clock TRST Test Reset EMU0 Emulation pin 0 EMU1 Emulation pin 1 PD(Vcc) Presence detect TCK_RET Test clock return GND Ground Compact TI (cTI) 20-pin JTAG Emulator Header This is a new JTAG emulator header that uses a 2x10 header (P/N: casd) with 0x100” x0.100” pin spacing. The pin configuration of this header is as follows: TMS Test mode select TDI Test data input TDIS Target Disconnect TDO Test data output TCK Test Clock nTRST Test Reset nSRST System Reset EMU0 Emulation pin 1 EMU1 Emulation pin 2 EMU2 Emulation pin 3 EMU3 Emulation pin 4 EMU4 Emulation pin 5 PD(Vcc) Presence detect TCK_RET Test clock return GND Ground XDS560T Trace 60-pin JTAG Emulator Header The XDS560T Trace header is a high-density connector for connection of the Trace Module. This highly-specialized connection is used with the Code Compose IDE v3.3 or higher. You can find more information on the Blackhawk XDS560T module at this link. A detailed description of the XDS560T Trace Emulation Header can be found in the Texas Instruments Knowledge Base article at this link.