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JTAG

The term JTAG is an acronym for Joint Test Action Group, a consortium of companies that banded together in 1985. The purpose was to devise a method of testing hardware at the IC level in an effort to eliminate the time consuming and costly procedure of building test fixtures. Their efforts resulted in a specification published by the IEEE as 1149.1. Today, IEEE 1149.1 is commonly referred to and interchangeable with "boundary scan". While the terms JTAG and boundary scan may be thought of as identical, there are major differences in the implementation based on the manufacturer and specific hardware design models. There are however, a few basic elements that must be present to facilitate JTAG functionality.

Additional JTAG Resources

• Texas Instruments Wiki on JTAG [goto TI WiKi]
• Comprehensive Online JTAG Tutorial [goto Corelis]
• Emulation Fundamentals for TI's DSP Solutions [download pdf]
• XDS Target Connection Guide TI Wiki [goto TI WiKi]
• Emulation and Trace Headers Technical Reference Manual [download pdf]
• JTAG/IEEE 1149.1 Design Considerations [download pdf]

Texas Instruments JTAG Emulator Configurations

At the present time, these are the most common JTAG header connections that are in use on Texas Instruments Development Kits (DSK), Launch Pads and Evaluation Modules (EVM).

Standard 14-pin JTAG Emulator Header

This is the most common of TI JTAG emulator headers. It is a 2x7 header  with 0.100” x0.100” pin spacing. The pin configuration of this header is as follows:

standard 14-pin jtag emulator header
  • TMS Test mode select
  • TDI Test data input
  • TDO Test data output
  • TCK Test Clock
  • TRST Test Reset
  • EMU0 Emulation pin 0
  • EMU1 Emulation pin 1
  • PD(Vcc) Presence detect
  • TCK_RET Test clock return
  • GND Ground

Compact TI (cTI) 20-pin JTAG Emulator Header

This is a newer JTAG emulator header that uses a 2x10 header with 0.100” x0.0500” pin spacing. The pin configuration of this header is as follows:

cTI jtag emulator header
  • TMS Test mode select
  • TDI Test data input
  • TDIS Target Disconnect
  • TDO Test data output
  • TCK Test Clock
  • nTRST Test Reset
  • nSRST System Reset
  • EMU0 Emulation pin 1
  • EMU1 Emulation pin 2
  • EMU2 Emulation pin 3
  • EMU3 Emulation pin 4
  • EMU4 Emulation pin 5
  • PD(Vcc) Presence detect
  • TCK_RET Test clock return
  • GND Ground

XDS560T Trace 60-pin JTAG Emulator Header

60-pin XDS560 Trace Header

This is a newer JTAG emulator header that uses a 2x10 header with 0.100” x0.0500” pin spacing. The pin configuration of this header is as follows:

The XDS560T Trace header is a high-density connector for connection of the Trace Module. This highly-specialized connection is used with the Code Compose IDE v3.3 or higher.

You can find more information on the Blackhawk XDS560T module at this link. A detailed description of the XDS560T Trace Emulation Header can be found in the Texas Instruments Knowledge Base article at this link: SPRU655.

 


 

Blackhawk JTAG Emulators for Texas Instruments (TI) DSPs are Advanced, High-speed USB, PCI and LAN based products.

Blackhawk Emulators support a wide array of Texas Instruments devices which include TMS320™ C5000™ Low Power DSPs, C6000™ High Performance DSPs, StellarisĀ® ARMĀ® Cortex™-based MCUs, Delfino™ and Piccolo™ C2000™ 32-bit Real-time MCUs, TMS470 (ARM®), OMAP™ Applications Processors, Sitara ARM Cortex™ A8 and ARM9, and DaVinci™ Video Processor platforms. Blackhawk JTAG emulators are compatible with Code Composer Studio (CCStudio™)IDE software.

Blackhawk JTAG Emulators are available from a worldwide network of industry resellers and distributors.

Blackhawk XDS560-class JTAG emulators now support the Corelis JTAG Boundary Scan tools. Corelis and Blackhawk are both part of EWA Technologies, Inc. and have integrated the powerful boundary-scan tools from Corelis with the advanced JTAG emulator from Blackhawk.  This integration allows customers who are currently using a Blackhawk JTAG Emulator to debug their TI DSP boards and extend their test capability by being able to run Corelis JTAG Boundary Scan software tools without the added expense of  purchasing another controller.  Increased capabilities for testing and debugging without the added cost of dedicated hardware.